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authorThierry Reding <treding@nvidia.com>2014-09-24 15:33:44 +0200
committerThierry Reding <treding@nvidia.com>2014-12-04 16:16:14 +0100
commit6d9adf6f00765c1f7787288ae3d80404e0939cb3 (patch)
tree9f012cc60e2c58abd3976847bf90c5d6fcd76da5 /arch/arm/boot/dts/tegra30.dtsi
parentb26ea06babf5026f68d5da98edfc164f8aee7346 (diff)
downloadop-kernel-dev-6d9adf6f00765c1f7787288ae3d80404e0939cb3.zip
op-kernel-dev-6d9adf6f00765c1f7787288ae3d80404e0939cb3.tar.gz
ARM: tegra: Enable IOMMU for display controllers on Tegra30
Add iommus properties to the device tree nodes for the two display controllers found on Tegra30. This will allow the display controllers to map physically non-contiguous buffers to I/O virtual contiguous address spaces so that they can be used for scan-out. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index fa7e5b6..976eb9b 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,5 +1,6 @@
#include <dt-bindings/clock/tegra30-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra30-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -174,6 +175,8 @@
resets = <&tegra_car 27>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DC>;
+
nvidia,head = <0>;
rgb {
@@ -191,6 +194,8 @@
resets = <&tegra_car 26>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DCB>;
+
nvidia,head = <1>;
rgb {
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