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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-16 18:36:12 +0530
committerStephen Warren <swarren@nvidia.com>2013-01-28 11:24:08 -0700
commitecfd6c7f05db5c3f41f846d489861646e0934b56 (patch)
tree372cccf8a697f2171b6ba25ebdf3e4cc96169d02 /arch/arm/boot/dts/tegra30-cardhu.dtsi
parentbeb0e325bea1118abe63d21f41825904d86b6fb6 (diff)
downloadop-kernel-dev-ecfd6c7f05db5c3f41f846d489861646e0934b56.zip
op-kernel-dev-ecfd6c7f05db5c3f41f846d489861646e0934b56.tar.gz
ARM: tegra: cardhu: register UARTC
UARTC is used for the interfacing with bluetooth device. Register this UART channel as high speed serial channel so that it can use the APB DMA for data transfer. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30-cardhu.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index bdb2a66..ff6b68f 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -106,6 +106,15 @@
nvidia,slew-rate-rising = <1>;
nvidia,slew-rate-falling = <1>;
};
+ uart3_txd_pw6 {
+ nvidia,pins = "uart3_txd_pw6",
+ "uart3_cts_n_pa1",
+ "uart3_rts_n_pc0",
+ "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <0>;
+ nvidia,tristate = <0>;
+ };
};
};
@@ -114,6 +123,12 @@
clock-frequency = <408000000>;
};
+ serial@70006200 {
+ compatible = "nvidia,tegra30-hsuart";
+ status = "okay";
+ clock-frequency = <408000000>;
+ };
+
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
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