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author | Thierry Reding <treding@nvidia.com> | 2015-04-29 13:53:21 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2015-05-04 13:25:19 +0200 |
commit | 5431b0fdadfec7aa61c916d6978544727a00b5fe (patch) | |
tree | 232525a3aed1842d685074d6531f2814caa5ca4a /arch/arm/boot/dts/tegra20.dtsi | |
parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
download | op-kernel-dev-5431b0fdadfec7aa61c916d6978544727a00b5fe.zip op-kernel-dev-5431b0fdadfec7aa61c916d6978544727a00b5fe.tar.gz |
ARM: tegra: Use lower-case hexadecimal digits
For consistency with other device tree content, use lower-case
hexadecimal digits in register region specifications.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index adf6b04..f444b67 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -563,7 +563,7 @@ fuse@7000f800 { compatible = "nvidia,tegra20-efuse"; - reg = <0x7000F800 0x400>; + reg = <0x7000f800 0x400>; clocks = <&tegra_car TEGRA20_CLK_FUSE>; clock-names = "fuse"; resets = <&tegra_car 39>; |