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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-11 19:03:03 +0530
committerStephen Warren <swarren@nvidia.com>2013-01-28 11:24:08 -0700
commit699ed4b94c6278ab0f629fde261af78cd1458f73 (patch)
tree7d17a2c8ec60cfba49b4ce8a45a0de24def25097 /arch/arm/boot/dts/tegra20.dtsi
parentbb2c1de9ffadc0e1cca1925a89cc04204b247f5b (diff)
downloadop-kernel-dev-699ed4b94c6278ab0f629fde261af78cd1458f73.zip
op-kernel-dev-699ed4b94c6278ab0f629fde261af78cd1458f73.tar.gz
ARM: tegra: add DT entry for KBC controller
NVIDIA's Tegra SoCs have the matrix keyboard controller which supports 16x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: added clocks property] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index c4c0bb7..47534d9 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -404,6 +404,14 @@
status = "disabled";
};
+ kbc {
+ compatible = "nvidia,tegra20-kbc";
+ reg = <0x7000e200 0x100>;
+ interrupts = <0 85 0x04>;
+ clocks = <&tegra_car 36>;
+ status = "disabled";
+ };
+
pmc {
compatible = "nvidia,tegra20-pmc";
reg = <0x7000e400 0x400>;
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