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| author | Linus Walleij <linus.walleij@linaro.org> | 2013-11-14 10:27:40 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-11-26 21:01:55 +0100 |
| commit | 38656820aa31e853c7bfbe2658cc8a78e303583b (patch) | |
| tree | 6950287124439587b5305e7d78ebecf27b8fb3e2 /arch/arm/boot/dts/ste-hrefprev60.dtsi | |
| parent | a12f703c5a27e2061fd0ea77200e5e2f8cfee54b (diff) | |
| download | op-kernel-dev-38656820aa31e853c7bfbe2658cc8a78e303583b.zip op-kernel-dev-38656820aa31e853c7bfbe2658cc8a78e303583b.tar.gz | |
ARM: ux500: move SPI pin config to device tree
This moves the SPI pin control table out of the board file
and into the device tree. Move the specific setting for
SSP0 on the HREFprev60 into the prev60-specific DTS file.
The SPI2 configuration is not really connected to any device,
as it will conflict with GPIO218 which is used on all HREFs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-hrefprev60.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ste-hrefprev60.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi index 6fc94ea..32295e3 100644 --- a/arch/arm/boot/dts/ste-hrefprev60.dtsi +++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi @@ -51,6 +51,15 @@ }; }; + ssp@80002000 { + /* + * On the first generation boards, this SSP/SPI port was connected + * to the AB8500. + */ + pinctrl-names = "default"; + pinctrl-0 = <&ssp0_hrefprev60_mode>; + }; + vmmci: regulator-gpio { gpios = <&tc3589x_gpio 18 0x4>; enable-gpio = <&tc3589x_gpio 17 0x4>; @@ -59,6 +68,19 @@ }; pinctrl { + ssp0 { + ssp0_hrefprev60_mode: ssp0_hrefprev60_default { + hrefprev60_mux { + ste,function = "ssp0"; + ste,pins = "ssp0_a_1"; + }; + hrefprev60_cfg1 { + ste,pins = "GPIO145_C13"; /* RXD */ + ste,config = <&in_pd>; + }; + + }; + }; sdi0 { /* This additional pin needed on early MOP500 and HREFs previous to v60 */ sdi0_default_mode: sdi0_default { |
