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| author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-08-07 12:54:10 +0200 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-08-07 17:33:54 +0200 |
| commit | 761c5867ef031fae244d030bc17c93f5a3df106f (patch) | |
| tree | c426b67747a8d51252ce25c42d560aefba3284ff /arch/arm/boot/dts/sama5d2.dtsi | |
| parent | 921f9a6ca5982efb2a300d45078617ad88f448a4 (diff) | |
| download | op-kernel-dev-761c5867ef031fae244d030bc17c93f5a3df106f.zip op-kernel-dev-761c5867ef031fae244d030bc17c93f5a3df106f.tar.gz | |
ARM: at91/dt: sama5d2: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it to the currently
defined nodes.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sama5d2.dtsi | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index f39258f..034cd48 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -764,16 +764,16 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb0_clk>; - clock-names = "t0_clk"; + clocks = <&tcb0_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; }; tcb1: timer@f8010000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8010000 0x100>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb1_clk>; - clock-names = "t0_clk"; + clocks = <&tcb1_clk>, <&clk32k>; + clock-names = "t0_clk", "slow_clk"; }; uart0: serial@f801c000 { @@ -857,6 +857,7 @@ compatible = "atmel,at91rm9200-rtc"; reg = <0xf80480b0 0x30>; interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; }; spi1: spi@fc000000 { |
