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| author | Caesar Wang <caesar.wang@rock-chips.com> | 2014-11-24 12:59:01 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-11-25 00:31:26 +0100 |
| commit | b67d6bc388236635377a07db432834b94a47cb5d (patch) | |
| tree | ff61d23ebf898e9a5ba8ec8901bfc4a1fd41bde9 /arch/arm/boot/dts/rk3288.dtsi | |
| parent | 9774d96beb2a6454760a0cf5ff8f8f1ce56fc425 (diff) | |
| download | op-kernel-dev-b67d6bc388236635377a07db432834b94a47cb5d.zip op-kernel-dev-b67d6bc388236635377a07db432834b94a47cb5d.tar.gz | |
ARM: dts: rockchip: add main thermal info to rk3288
If for some reason we are unable to shut it down in orderly fashion
(kernel is stuck holding a lock or similar), then hardware TSHUT will
reset it.
If the temperature is over 95C over a period of time the thermal shutdown
of the tsadc is invoked with can either reset the entire chip via the CRU,
or notify the PMIC via a GPIO. This should be set in the specific board.
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index ebcd2d2..acb6a2f 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/clock/rk3288-cru.h> +#include <dt-bindings/thermal/thermal.h> #include "skeleton.dtsi" / { @@ -68,6 +69,7 @@ 216000 900000 126000 900000 >; + #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; }; @@ -357,6 +359,25 @@ status = "disabled"; }; + thermal-zones { + #include "rk3288-thermal.dtsi" + }; + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "default"; + pinctrl-0 = <&otp_out>; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; + usb_host0_ehci: usb@ff500000 { compatible = "generic-ehci"; reg = <0xff500000 0x100>; @@ -1016,6 +1037,12 @@ }; }; + tsadc { + otp_out: otp-out { + rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + pwm0 { pwm0_pin: pwm0-pin { rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>; |
