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authorPhil Edworthy <phil.edworthy@renesas.com>2014-06-13 10:37:19 +0100
committerSimon Horman <horms+renesas@verge.net.au>2014-06-17 19:58:30 +0900
commit66c405e72bf332e59ab29461e33a4e94cb8bdd7a (patch)
treef0c7cf389fe7c4c1a233c17a41de3d54b6d3b573 /arch/arm/boot/dts/r8a7791.dtsi
parent4bfb37675b5343798f5260adad92a67444a9fd47 (diff)
downloadop-kernel-dev-66c405e72bf332e59ab29461e33a4e94cb8bdd7a.zip
op-kernel-dev-66c405e72bf332e59ab29461e33a4e94cb8bdd7a.tar.gz
ARM: shmobile: r8a7791: Add default PCIe bus clock
This patch adds a default PCIe bus clock node. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [horms+renesas@verge.net.au: resolved conflict] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index a15bf7a..7f7eda7 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -555,6 +555,15 @@
clock-output-names = "audio_clk_c";
};
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "pcie_bus";
+ status = "disabled";
+ };
+
/* Special CPG clocks */
cpg_clocks: cpg_clocks@e6150000 {
compatible = "renesas,r8a7791-cpg-clocks",
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