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author | Linus Walleij <linus.walleij@linaro.org> | 2016-06-17 22:28:05 +0200 |
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committer | Andy Gross <andy.gross@linaro.org> | 2016-06-27 17:36:55 -0500 |
commit | 0840ea9e4457abedf92d3a89ab372fbb091e7a3c (patch) | |
tree | 3365a07a91c886f01976289bf7a3d3af16c4c599 /arch/arm/boot/dts/qcom-msm8660.dtsi | |
parent | 72f3cd64dccf663b0a1705bf215987cd5a2a11d2 (diff) | |
download | op-kernel-dev-0840ea9e4457abedf92d3a89ab372fbb091e7a3c.zip op-kernel-dev-0840ea9e4457abedf92d3a89ab372fbb091e7a3c.tar.gz |
ARM: dts: add GPIO and MPP to MSM8660 PMIC
This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660
DTSI. Verified against the vendor tree to be in these locations
with these interrupts, tested on the APQ8060 Dragonboard.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8660.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8660.dtsi | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index cd21403..6a62b62 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -143,6 +143,44 @@ #address-cells = <1>; #size-cells = <0>; + pm8058_gpio: gpio@150 { + compatible = "qcom,pm8058-gpio", + "qcom,ssbi-gpio"; + reg = <0x150>; + interrupt-parent = <&pmicintc>; + interrupts = <192 1>, <193 1>, <194 1>, + <195 1>, <196 1>, <197 1>, + <198 1>, <199 1>, <200 1>, + <201 1>, <202 1>, <203 1>, + <204 1>, <205 1>, <206 1>, + <207 1>, <208 1>, <209 1>, + <210 1>, <211 1>, <212 1>, + <213 1>, <214 1>, <215 1>, + <216 1>, <217 1>, <218 1>, + <219 1>, <220 1>, <221 1>, + <222 1>, <223 1>, <224 1>, + <225 1>, <226 1>, <227 1>, + <228 1>, <229 1>, <230 1>, + <231 1>, <232 1>, <233 1>, + <234 1>, <235 1>; + gpio-controller; + #gpio-cells = <2>; + + }; + + pm8058_mpps: mpps@50 { + compatible = "qcom,pm8058-mpp", + "qcom,ssbi-mpp"; + reg = <0x50>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&pmicintc>; + interrupts = + <128 1>, <129 1>, <130 1>, <131 1>, + <132 1>, <133 1>, <134 1>, <135 1>, + <136 1>, <137 1>, <138 1>, <139 1>; + }; + pwrkey@1c { compatible = "qcom,pm8058-pwrkey"; reg = <0x1c>; |