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author | Pramod Gurav <pramod.gurav@smartplayin.com> | 2015-07-27 14:52:10 +0100 |
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committer | Andy Gross <agross@codeaurora.org> | 2015-07-27 16:01:41 -0500 |
commit | 86e252a4f850a525ad5514163e14a36f1f1d19a4 (patch) | |
tree | b5511050a816b6b622da57ec361068feb4227bba /arch/arm/boot/dts/qcom-apq8064.dtsi | |
parent | bce3604696769afd4ec575f15499aad174e14a74 (diff) | |
download | op-kernel-dev-86e252a4f850a525ad5514163e14a36f1f1d19a4.zip op-kernel-dev-86e252a4f850a525ad5514163e14a36f1f1d19a4.tar.gz |
ARM: dts: apq8064: Add DT support for GSBI6 and for UART pin mux
This change adds DT support for GSBI6 and muxes the gpio pins
as UART lines. Also defines a alias for serial port on these lines.
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
[Srinivas Kandagatla]: fix pinctrl location and rename alias correctly
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8064.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index d17c399..e631b58 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -126,6 +126,13 @@ function = "gsbi3"; }; }; + + uart_pins: uart_pins { + mux { + pins = "gpio14", "gpio15", "gpio16", "gpio17"; + function = "gsbi6"; + }; + }; }; intc: interrupt-controller@2000000 { @@ -248,7 +255,6 @@ #address-cells = <1>; #size-cells = <1>; ranges; - i2c3: i2c@16280000 { compatible = "qcom,i2c-qup-v1.1.1"; reg = <0x16280000 0x1000>; @@ -259,6 +265,28 @@ }; }; + gsbi6: gsbi@16500000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <6>; + reg = <0x16500000 0x03>; + clocks = <&gcc GSBI6_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gsbi6_serial: serial@16540000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16540000 0x100>, + <0x16500000 0x03>; + interrupts = <0 156 0x0>; + clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; + gsbi7: gsbi@16600000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0"; |