diff options
| author | Russell King <rmk+kernel@armlinux.org.uk> | 2017-09-09 16:34:41 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2017-09-09 16:34:41 +0100 |
| commit | e558bdc21ae1f0db520eccd84015e17d8a589973 (patch) | |
| tree | b436123bd52f267b8c7f361618cded3e1e4421ea /arch/arm/boot/dts/omap44xx-clocks.dtsi | |
| parent | 746a272e44141af24a02f6c9b0f65f4c4598ed42 (diff) | |
| parent | 9a3dc3186fc3795e076a4122da9e0258651a9631 (diff) | |
| download | op-kernel-dev-e558bdc21ae1f0db520eccd84015e17d8a589973.zip op-kernel-dev-e558bdc21ae1f0db520eccd84015e17d8a589973.tar.gz | |
Merge branches 'fixes' and 'misc' into for-linus
Diffstat (limited to 'arch/arm/boot/dts/omap44xx-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap44xx-clocks.dtsi | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi b/arch/arm/boot/dts/omap44xx-clocks.dtsi index 9573b37..05732ed 100644 --- a/arch/arm/boot/dts/omap44xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi @@ -357,6 +357,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin_ck>, <&iva_hsd_byp_clk_mux_ck>; reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; + assigned-clocks = <&dpll_iva_ck>; + assigned-clock-rates = <931200000>; }; dpll_iva_x2_ck: dpll_iva_x2_ck { @@ -374,6 +376,8 @@ reg = <0x01b8>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_iva_m4x2_ck>; + assigned-clock-rates = <465600000>; }; dpll_iva_m5x2_ck: dpll_iva_m5x2_ck@1bc { @@ -385,6 +389,8 @@ reg = <0x01bc>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_iva_m5x2_ck>; + assigned-clock-rates = <266100000>; }; dpll_mpu_ck: dpll_mpu_ck@160 { @@ -969,22 +975,6 @@ ti,max-div = <2>; }; - aes1_fck: aes1_fck@15a0 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l3_div_ck>; - ti,bit-shift = <1>; - reg = <0x15a0>; - }; - - aes2_fck: aes2_fck@15a8 { - #clock-cells = <0>; - compatible = "ti,gate-clock"; - clocks = <&l3_div_ck>; - ti,bit-shift = <1>; - reg = <0x15a8>; - }; - dss_sys_clk: dss_sys_clk@1120 { #clock-cells = <0>; compatible = "ti,gate-clock"; |
