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authorArnd Bergmann <arnd@arndb.de>2011-10-31 14:07:51 +0100
committerArnd Bergmann <arnd@arndb.de>2011-10-31 14:07:51 +0100
commit86c1e5a74af11e4817ffa6d7748d9ac1353b5b53 (patch)
tree377327a40452c4282787f49456122bf1753a0255 /arch/arm/boot/dts/omap3.dtsi
parent6a8d2e2b504ce3d12cfa3934f545c9415441a5c3 (diff)
parent3ae3e253db7385238dd9d6c67c085afa3e770a56 (diff)
downloadop-kernel-dev-86c1e5a74af11e4817ffa6d7748d9ac1353b5b53.zip
op-kernel-dev-86c1e5a74af11e4817ffa6d7748d9ac1353b5b53.tar.gz
Merge branch 'omap/dt' into next/dt
Diffstat (limited to 'arch/arm/boot/dts/omap3.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3.dtsi63
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diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
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+/*
+ * Device Tree Source for OMAP3 SoC
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "ti,omap3430", "ti,omap3";
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a8";
+ };
+ };
+
+ /*
+ * The soc node represents the soc top level view. It is uses for IPs
+ * that are not memory mapped in the MPU view or for the MPU itself.
+ */
+ soc {
+ compatible = "ti,omap-infra";
+ mpu {
+ compatible = "ti,omap3-mpu";
+ ti,hwmods = "mpu";
+ };
+
+ iva {
+ compatible = "ti,iva2.2";
+ ti,hwmods = "iva";
+
+ dsp {
+ compatible = "ti,omap3-c64";
+ };
+ };
+ };
+
+ /*
+ * XXX: Use a flat representation of the OMAP3 interconnect.
+ * The real OMAP interconnect network is quite complex.
+ * Since that will not bring real advantage to represent that in DT for
+ * the moment, just use a fake OCP bus entry to represent the whole bus
+ * hierarchy.
+ */
+ ocp {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ ti,hwmods = "l3_main";
+
+ intc: interrupt-controller@1 {
+ compatible = "ti,omap3-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
+};
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