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| author | Olof Johansson <olof@lixom.net> | 2018-07-14 15:14:02 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2018-07-14 15:14:02 -0700 |
| commit | 13e66ceea1600f1061181acc2d4e0fac1a7d0333 (patch) | |
| tree | b0372e59ae22ca653c7453f7742fe46bdac2fd57 /arch/arm/boot/dts/am3517.dtsi | |
| parent | d4f72a70fed01040e56be505a51443bd894b11d9 (diff) | |
| parent | 923847413f7316b5ced3491769b3fefa6c56a79a (diff) | |
| download | op-kernel-dev-13e66ceea1600f1061181acc2d4e0fac1a7d0333.zip op-kernel-dev-13e66ceea1600f1061181acc2d4e0fac1a7d0333.tar.gz | |
Merge tag 'omap-for-v4.18/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Two omap fixes for v4.18-rc cycle
Turns out the recent patches for ARM branch predictor hardening are
not working on omap5 and dra7 as planned because the secondary CPU
is parked to the bootrom code. We can't configure it in the bootloader.
So we must enable invalidates of BTB for omap5 and dra7 secondary
core in the kernel.
And there's a fix for reserved register access for am3517. The
usb otg module on am3517 is not the same as for other omap3.
* tag 'omap-for-v4.18/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am3517.dtsi: Disable reference to OMAP3 OTG controller
ARM: DRA7/OMAP5: Enable ACTLR[0] (Enable invalidates of BTB) for secondary cores
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/am3517.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am3517.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi index 4b6062b..23ea381 100644 --- a/arch/arm/boot/dts/am3517.dtsi +++ b/arch/arm/boot/dts/am3517.dtsi @@ -91,6 +91,11 @@ }; }; +/* Table Table 5-79 of the TRM shows 480ab000 is reserved */ +&usb_otg_hs { + status = "disabled"; +}; + &iva { status = "disabled"; }; |
