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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-05-17 17:21:23 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-17 17:21:23 +0100
commitfda0e18c8a7a3e02747c2b045b4fcd2c920410b9 (patch)
tree6dac80c846592901cbfdcff029525d7994465282 /arch/arm/Kconfig
parent98830bc9967b18d6f9a614a1f354f5580196ef85 (diff)
parentd1e86d64bc48dedd0d68d182d0ce6951d8b4fd0d (diff)
downloadop-kernel-dev-fda0e18c8a7a3e02747c2b045b4fcd2c920410b9.zip
op-kernel-dev-fda0e18c8a7a3e02747c2b045b4fcd2c920410b9.tar.gz
Merge branch 'devel-pmu' into devel
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9e938a7..2b3157b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -13,7 +13,7 @@ config ARM
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
select GENERIC_ATOMIC64 if (!CPU_32v6K)
- select HAVE_OPROFILE
+ select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
select HAVE_ARCH_KGDB
select HAVE_KPROBES if (!XIP_KERNEL)
select HAVE_KRETPROBES if (HAVE_KPROBES)
@@ -181,28 +181,6 @@ config ARM_L1_CACHE_SHIFT_6
help
Setting ARM L1 cache line size to 64 Bytes.
-if OPROFILE
-
-config OPROFILE_ARMV6
- def_bool y
- depends on CPU_V6 && !SMP
- select OPROFILE_ARM11_CORE
-
-config OPROFILE_MPCORE
- def_bool y
- depends on CPU_V6 && SMP
- select OPROFILE_ARM11_CORE
-
-config OPROFILE_ARM11_CORE
- bool
-
-config OPROFILE_ARMV7
- def_bool y
- depends on CPU_V7 && !SMP
- bool
-
-endif
-
config VECTORS_BASE
hex
default 0xffff0000 if MMU || CPU_HIGH_VECTOR
@@ -1314,7 +1292,7 @@ config HIGHPTE
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
- depends on PERF_EVENTS && CPU_HAS_PMU && (CPU_V6 || CPU_V7)
+ depends on PERF_EVENTS && CPU_HAS_PMU
default y
help
Enable hardware performance counter support for perf events. If
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