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| author | Vineet Gupta <vgupta@synopsys.com> | 2013-05-09 21:55:27 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2013-05-09 22:00:57 +0530 |
| commit | de2a852cc0d4c4d6a9c22a597c9cc231f2e6ceb4 (patch) | |
| tree | e4d86c107073f9dedaf1886f9f1deeacebb7ca45 /arch/arc | |
| parent | 4102b53392d6397d80b6e09b516517efacf7ea77 (diff) | |
| download | op-kernel-dev-de2a852cc0d4c4d6a9c22a597c9cc231f2e6ceb4.zip op-kernel-dev-de2a852cc0d4c4d6a9c22a597c9cc231f2e6ceb4.tar.gz | |
ARC: [mm] Aliasing VIPT dcache support 3/4
Fix the one zillion warnings
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
| -rw-r--r-- | arch/arc/include/asm/cacheflush.h | 4 | ||||
| -rw-r--r-- | arch/arc/mm/cache_arc700.c | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index d692fbb..14a0fea 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h @@ -33,7 +33,9 @@ void flush_cache_all(void); void flush_icache_range(unsigned long start, unsigned long end); void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len); void __inv_icache_page(unsigned long paddr, unsigned long vaddr); -void __flush_dcache_page(unsigned long paddr, unsigned long vaddr); +void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr); +#define __flush_dcache_page(p, v) \ + ___flush_dcache_page((unsigned long)p, (unsigned long)v) #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c index 9887195..2f12bca 100644 --- a/arch/arc/mm/cache_arc700.c +++ b/arch/arc/mm/cache_arc700.c @@ -624,7 +624,7 @@ void __inv_icache_page(unsigned long paddr, unsigned long vaddr) * wrapper to clearout kernel or userspace mappings of a page * For kernel mappings @vaddr == @paddr */ -void __flush_dcache_page(unsigned long paddr, unsigned long vaddr) +void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr) { __dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV); } |
