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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-10 10:11:26 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-10 10:11:26 -0700 |
| commit | 8f041e6ca1901d7dbf017e6db67c264117211b8a (patch) | |
| tree | eeae46a7ba63e656a802ece06501a623bec7f914 /arch/arc/plat-arcfpga | |
| parent | b247759642cc96a75122907cc898b4c43b4f86ce (diff) | |
| parent | 723e2b801d803035ec7a7c0fe162a6c9fc118164 (diff) | |
| download | op-kernel-dev-8f041e6ca1901d7dbf017e6db67c264117211b8a.zip op-kernel-dev-8f041e6ca1901d7dbf017e6db67c264117211b8a.tar.gz | |
Merge tag 'arc-v3.11-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull second set of ARC architecture updates from Vineet Gupta:
"Couple of Platform updates (Device Tree files primarily) given that
the corresponding drivers (net/ethernet/arc/*, irqctl/irq-tb10x.c)
have now been merged into your tree.
Ideally these shd have been part of same submissions, oh well..."
* tag 'arc-v3.11-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: [TB10x] Updates for irqchip driver
ARC: [plat-arcfpga] Enable arc_emac for ARCAngle4 Board
Diffstat (limited to 'arch/arc/plat-arcfpga')
| -rw-r--r-- | arch/arc/plat-arcfpga/include/plat/irq.h | 2 | ||||
| -rw-r--r-- | arch/arc/plat-arcfpga/include/plat/memmap.h | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/arch/arc/plat-arcfpga/include/plat/irq.h b/arch/arc/plat-arcfpga/include/plat/irq.h index 41e3356..6adbc53 100644 --- a/arch/arc/plat-arcfpga/include/plat/irq.h +++ b/arch/arc/plat-arcfpga/include/plat/irq.h @@ -16,8 +16,6 @@ #define UART1_IRQ 10 #define UART2_IRQ 11 -#define VMAC_IRQ 6 - #define IDE_IRQ 13 #define PCI_IRQ 14 #define PS2_IRQ 15 diff --git a/arch/arc/plat-arcfpga/include/plat/memmap.h b/arch/arc/plat-arcfpga/include/plat/memmap.h index 1663f33..5c78e61 100644 --- a/arch/arc/plat-arcfpga/include/plat/memmap.h +++ b/arch/arc/plat-arcfpga/include/plat/memmap.h @@ -15,8 +15,6 @@ #define UART0_BASE 0xC0FC1000 #define UART1_BASE 0xC0FC1100 -#define VMAC_REG_BASEADDR 0xC0FC2000 - #define IDE_CONTROLLER_BASE 0xC0FC9000 #define AHB_PCI_HOST_BRG_BASE 0xC0FD0000 |
