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authorVineet Gupta <vgupta@synopsys.com>2013-05-13 18:30:41 +0530
committerVineet Gupta <vgupta@synopsys.com>2015-06-22 14:06:55 +0530
commit1f6ccfff6314672743ad7252160654709e997a2a (patch)
treef2027c01b8d010b9d1aaa3685c7c4d0644271f53 /arch/arc/mm
parent820970a5aa3c98be26e1df64da4b93294d20d4e7 (diff)
downloadop-kernel-dev-1f6ccfff6314672743ad7252160654709e997a2a.zip
op-kernel-dev-1f6ccfff6314672743ad7252160654709e997a2a.tar.gz
ARCv2: Support for ARCv2 ISA and HS38x cores
The notable features are: - SMP configurations of upto 4 cores with coherency - Optional L2 Cache and IO-Coherency - Revised Interrupt Architecture (multiple priorites, reg banks, auto stack switch, auto regfile save/restore) - MMUv4 (PIPT dcache, Huge Pages) - Instructions for * 64bit load/store: LDD, STD * Hardware assisted divide/remainder: DIV, REM * Function prologue/epilogue: ENTER_S, LEAVE_S * IRQ enable/disable: CLRI, SETI * pop count: FFS, FLS * SETcc, BMSKN, XBFU... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm')
-rw-r--r--arch/arc/mm/tlbex.S2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index d224bf0..00c8d7f 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -35,8 +35,6 @@
* Rahul Trivedi, Amit Bhor: Codito Technologies 2004
*/
- .cpu A7
-
#include <linux/linkage.h>
#include <asm/entry.h>
#include <asm/mmu.h>
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