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authorVineet Gupta <vgupta@synopsys.com>2013-06-12 15:35:18 +0530
committerVineet Gupta <vgupta@synopsys.com>2013-06-22 13:46:42 +0530
commit6546415226f2fc3ab0a820464774e02a1679f90a (patch)
tree3fc965981100d163d5370996d7d98b75ff664f70 /arch/arc/kernel/troubleshoot.c
parentda1677b02d3ef674dfd8a4ba1ed32153dc717fa2 (diff)
downloadop-kernel-dev-6546415226f2fc3ab0a820464774e02a1679f90a.zip
op-kernel-dev-6546415226f2fc3ab0a820464774e02a1679f90a.tar.gz
ARC: Reduce Code for ECR printing
Cause codes are same for D-TLB-Miss and Prot-V Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/troubleshoot.c')
-rw-r--r--arch/arc/kernel/troubleshoot.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c
index 11c301b..31a5d89 100644
--- a/arch/arc/kernel/troubleshoot.c
+++ b/arch/arc/kernel/troubleshoot.c
@@ -131,9 +131,9 @@ static void show_ecr_verbose(struct pt_regs *regs)
/* For DTLB Miss or ProtV, display the memory involved too */
if (vec == ECR_V_DTLB_MISS) {
- pr_cont("Invalid %s 0x%08lx by insn @ 0x%08lx\n",
- (cause_code == 0x01) ? "Read From" :
- ((cause_code == 0x02) ? "Write to" : "EX"),
+ pr_cont("Invalid %s @ 0x%08lx by insn @ 0x%08lx\n",
+ (cause_code == 0x01) ? "Read" :
+ ((cause_code == 0x02) ? "Write" : "EX"),
address, regs->ret);
} else if (vec == ECR_V_ITLB_MISS) {
pr_cont("Insn could not be fetched\n");
@@ -144,14 +144,12 @@ static void show_ecr_verbose(struct pt_regs *regs)
} else if (vec == ECR_V_PROTV) {
if (cause_code == ECR_C_PROTV_INST_FETCH)
pr_cont("Execute from Non-exec Page\n");
- else if (cause_code == ECR_C_PROTV_LOAD)
- pr_cont("Read from Non-readable Page\n");
- else if (cause_code == ECR_C_PROTV_STORE)
- pr_cont("Write to Non-writable Page\n");
- else if (cause_code == ECR_C_PROTV_XCHG)
- pr_cont("Data exchange protection violation\n");
else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
pr_cont("Misaligned r/w from 0x%08lx\n", address);
+ else
+ pr_cont("%s access not allowed on page\n",
+ (cause_code == 0x01) ? "Read" :
+ ((cause_code == 0x02) ? "Write" : "EX"));
} else if (vec == ECR_V_INSN_ERR) {
pr_cont("Illegal Insn\n");
} else {
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