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authorVineet Gupta <vgupta@synopsys.com>2015-03-09 14:33:40 +0530
committerVineet Gupta <vgupta@synopsys.com>2015-06-25 06:00:20 +0530
commit5fa2daaa8d8223d06fcdba171a7a668dc8e8b179 (patch)
tree5132e9df1f44b37430a15b28e4f60cfbf1c037be /arch/arc/kernel/devtree.c
parente0183f523025f96e2053200616a6d602ea2b3451 (diff)
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ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/devtree.c')
-rw-r--r--arch/arc/kernel/devtree.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index f801d46..7e844fd 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -33,7 +33,7 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)
if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
arc_base_baud = core_clk/3;
else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
- arc_base_baud = 33333333; /* Fixed 33MHz clk */
+ arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */
else
arc_base_baud = core_clk;
}
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