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author | Vlad Zakharov <Vladislav.Zakharov@synopsys.com> | 2017-03-03 14:30:01 +0300 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2017-03-05 20:04:59 -0800 |
commit | 4ed10958ae461168be310b4bbee13f745e4c1547 (patch) | |
tree | d0f3143c1477e1d5618726fd73434356a8a8aa5d /arch/arc/boot/dts | |
parent | 854c11e250730eaffec2ad56e9224c6be8a7979d (diff) | |
download | op-kernel-dev-4ed10958ae461168be310b4bbee13f745e4c1547.zip op-kernel-dev-4ed10958ae461168be310b4bbee13f745e4c1547.tar.gz |
ARC: [dts] add cpu nodes to ARCHS SMP device tree
Trying to get clock for CPU cores on SMP systems I found that I was only
able to get clock for core[0]. That was because only one cpu@0 node was
represented in ARC HS device tree and it was impossible to get clock for
"non-existing" cores.
So as ARC HS may have up to 4 cores we update device tree to match
maximum possible cores quantity.
Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/boot/dts')
-rw-r--r-- | arch/arc/boot/dts/skeleton_hs_idu.dtsi | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/arc/boot/dts/skeleton_hs_idu.dtsi b/arch/arc/boot/dts/skeleton_hs_idu.dtsi index 662c5e0..54b277d 100644 --- a/arch/arc/boot/dts/skeleton_hs_idu.dtsi +++ b/arch/arc/boot/dts/skeleton_hs_idu.dtsi @@ -19,10 +19,28 @@ cpu@0 { device_type = "cpu"; - compatible = "snps,archs38xN"; + compatible = "snps,archs38"; reg = <0>; clocks = <&core_clk>; }; + cpu@1 { + device_type = "cpu"; + compatible = "snps,archs38"; + reg = <1>; + clocks = <&core_clk>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "snps,archs38"; + reg = <2>; + clocks = <&core_clk>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "snps,archs38"; + reg = <3>; + clocks = <&core_clk>; + }; }; /* TIMER0 with interrupt for clockevent */ |