diff options
| author | Richard Henderson <rth@twiddle.net> | 2013-07-12 16:15:56 -0700 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2013-11-16 16:33:13 -0800 |
| commit | fddd87d6e135924b92499917bace103e46c22d00 (patch) | |
| tree | 23bbe6a01a32c0ea88f7c2180dbd1f461d822c76 /arch/alpha/kernel/time.c | |
| parent | 994dcf7055df88623d25f3593b931a018a76b502 (diff) | |
| download | op-kernel-dev-fddd87d6e135924b92499917bace103e46c22d00.zip op-kernel-dev-fddd87d6e135924b92499917bace103e46c22d00.tar.gz | |
alpha: Allow HZ to be configured
With the 1024Hz default, we spend 50% of QEMU emulation
processing timer interrupts.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'arch/alpha/kernel/time.c')
| -rw-r--r-- | arch/alpha/kernel/time.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index ea33950..a6bcb31 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c @@ -201,16 +201,26 @@ irqreturn_t timer_interrupt(int irq, void *dev) void __init common_init_rtc(void) { - unsigned char x; + unsigned char x, sel = 0; /* Reset periodic interrupt frequency. */ - x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; - /* Test includes known working values on various platforms - where 0x26 is wrong; we refuse to change those. */ - if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { - printk("Setting RTC_FREQ to 1024 Hz (%x)\n", x); - CMOS_WRITE(0x26, RTC_FREQ_SELECT); +#if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 + x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; + /* Test includes known working values on various platforms + where 0x26 is wrong; we refuse to change those. */ + if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { + sel = RTC_REF_CLCK_32KHZ + 6; } +#elif CONFIG_HZ == 256 || CONFIG_HZ == 128 || CONFIG_HZ == 64 || CONFIG_HZ == 32 + sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ); +#else +# error "Unknown HZ from arch/alpha/Kconfig" +#endif + if (sel) { + printk(KERN_INFO "Setting RTC_FREQ to %d Hz (%x)\n", + CONFIG_HZ, sel); + CMOS_WRITE(sel, RTC_FREQ_SELECT); + } /* Turn on periodic interrupts. */ x = CMOS_READ(RTC_CONTROL); |
