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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-04-23 16:21:26 -0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-05-21 10:11:56 -0700 |
commit | 3edad321b1bd2e6c8b5f38146c115c8982438f06 (patch) | |
tree | d58e2393d49e1f1af0797778d1ed87fb6780e8dc /Makefile | |
parent | ced9017a4fc7ecf35a9c0c0bd8e46d14876b9fd1 (diff) | |
download | op-kernel-dev-3edad321b1bd2e6c8b5f38146c115c8982438f06.zip op-kernel-dev-3edad321b1bd2e6c8b5f38146c115c8982438f06.tar.gz |
drivers: memory: Introduce Marvell EBU Device Bus driver
Marvell EBU SoCs such as Armada 370/XP, Orion5x (88f5xxx) and
Discovery (mv78xx0) supports a Device Bus controller to access several
kinds of memories and I/O devices (NOR, NAND, SRAM, FPGA).
This commit adds a driver to handle this controller. So far only
Armada 370, Armada XP and Discovery SoCs are supported.
The driver must be registered through a device tree node;
as explained in the binding document.
For each child node in the device tree, this driver will:
* set timing parameters
* register a child device
* setup an address decoding window, using the mbus driver
Keep in mind the address decoding window setup is only a temporary hack.
This code will be removed from this devbus driver as soon as a proper device
tree binding for the mbus driver is added.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Makefile')
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