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author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2017-09-14 17:28:42 +0300 |
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committer | Philipp Zabel <p.zabel@pengutronix.de> | 2017-09-18 18:41:27 +0200 |
commit | 376349232a93645624426db782cafe688054e6d6 (patch) | |
tree | e5ea4b109e292007b1c336f95fd61395a7d3eb84 /MAINTAINERS | |
parent | 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff) | |
download | op-kernel-dev-376349232a93645624426db782cafe688054e6d6.zip op-kernel-dev-376349232a93645624426db782cafe688054e6d6.tar.gz |
ARC: reset: introduce AXS10x reset driver
ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped register (AKA CREG) which
represents up-to 32 reset lines. This regiter is self-clearing so we
don't need to deassert line after reset.
As of today only the following lines are used:
- DW GMAC - line 5
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r-- | MAINTAINERS | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 2281af4..2cf502e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12883,6 +12883,12 @@ F: arch/arc/plat-axs10x F: arch/arc/boot/dts/ax* F: Documentation/devicetree/bindings/arc/axs10* +SYNOPSYS AXS10x RESET CONTROLLER DRIVER +M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> +S: Supported +F: drivers/reset/reset-axs10x.c +F: Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt + SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar <vireshk@kernel.org> M: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |