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authorSebastian Andrzej Siewior <bigeasy@linutronix.de>2010-11-22 17:12:17 -0800
committerSebastian Andrzej Siewior <bigeasy@linutronix.de>2010-12-02 17:55:12 +0100
commit2a8626a9e2d86d114a2d9f813a1acebf9d53dd10 (patch)
treefa8764bdc568371a6e3038a402cc101eda07bb19 /Kconfig
parentd0777f2c3eda180e3fc549e0efbe741014f17689 (diff)
downloadop-kernel-dev-2a8626a9e2d86d114a2d9f813a1acebf9d53dd10.zip
op-kernel-dev-2a8626a9e2d86d114a2d9f813a1acebf9d53dd10.tar.gz
spi/pxa2xx: Add chipselect support for Sodaville
The SPI core on Sodaville supports chip selects. Its configuration moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked up with up to 4 devices. This patch ensures that the bits which are otherwiese reserved are only touched on Sodaville and not on any other PXAs. Also it makes sure that the status register does not lose the CS information while clearing the ROR bit. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
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