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| author | Dinh Nguyen <dinguyen@altera.com> | 2012-10-25 10:41:39 -0600 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-10-26 14:59:39 +0200 |
| commit | 9c4566a117a6fe404a0e49b27ac71b631945a70f (patch) | |
| tree | 21802a1dc88b6dbd4ea39f7cc11b734c4f5465c9 /Documentation | |
| parent | 6f0c0580b70c89094b3422ba81118c7b959c7556 (diff) | |
| download | op-kernel-dev-9c4566a117a6fe404a0e49b27ac71b631945a70f.zip op-kernel-dev-9c4566a117a6fe404a0e49b27ac71b631945a70f.tar.gz | |
ARM: socfpga: Enable SMP for socfpga
Enable SMP for the SOCFPGA platform.
Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt | 11 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/arm/altera/socfpga-system.txt | 11 |
2 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt new file mode 100644 index 0000000..ecdb57d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt @@ -0,0 +1,11 @@ +Altera SOCFPGA Reset Manager + +Required properties: +- compatible : "altr,rst-mgr" +- reg : Should contain 1 register ranges(address and length) + +Example: + rstmgr@ffd05000 { + compatible = "altr,rst-mgr"; + reg = <0xffd05000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt new file mode 100644 index 0000000..07c65e3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt @@ -0,0 +1,11 @@ +Altera SOCFPGA System Manager + +Required properties: +- compatible : "altr,sys-mgr" +- reg : Should contain 1 register ranges(address and length) + +Example: + sysmgr@ffd08000 { + compatible = "altr,sys-mgr"; + reg = <0xffd08000 0x1000>; + }; |
