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| author | David S. Miller <davem@davemloft.net> | 2014-05-05 13:19:00 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-05-05 13:19:00 -0400 |
| commit | 05f4640979e0d67fae56be42393fb5b81a0293de (patch) | |
| tree | 8ba8dfc3b5b59768750c5a572700e62745b42d0a /Documentation | |
| parent | 56bfa7ee7c8892f1aa61797e4b8fec84b31d29b3 (diff) | |
| parent | de21b26e51d1ab35696b99a29afc30582cfda031 (diff) | |
| download | op-kernel-dev-05f4640979e0d67fae56be42393fb5b81a0293de.zip op-kernel-dev-05f4640979e0d67fae56be42393fb5b81a0293de.tar.gz | |
Merge branch 'am437x'
George Cherian says:
====================
The series adds CPTS support for AM4372.
Patch 1 - DT changes w.r.t clock changes for AM33xx.
Patch 2 - CPTS clock name harcoding in the driver is removed.
Easier to pass the clock name from dt rather than hardcoding in driver.
Also in prepration for DRA7x CPTS support.
Patch 3 - Enable the CPTS support for both DRA7x and AM4372 in the driver.
Patch 4 - Enable the Annexe F for L2 PTP for AM437x and DRA7x.
Patch 5 - Change the default clocksource to dpll_core_m5
Patch 6 - DT changes for AM4372.
v1 -> v2
Patch 1 and 2 Re-ordering.
Seperate TS_BITS define for Hw version V2 and V3
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions
