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author | Ivan T. Ivanov <iivanov@mm-sol.com> | 2014-03-13 19:07:42 -0700 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2014-03-28 23:41:26 +0100 |
commit | 61284405025d1ea646f1f9a1f740e6b573b8c9d1 (patch) | |
tree | 51291ec12210468c47dfce2a9a03fe45f7bb0115 /Documentation | |
parent | a9965d73fdc9684bb55ae8be4f0ddc8067dca1c8 (diff) | |
download | op-kernel-dev-61284405025d1ea646f1f9a1f740e6b573b8c9d1.zip op-kernel-dev-61284405025d1ea646f1f9a1f740e6b573b8c9d1.tar.gz |
i2c: qup: Add device tree bindings information
The Qualcomm Universal Peripherial (QUP) wraps I2C mini-core and
provide input and output FIFO's for it. I2C controller can operate
as master with supported bus speeds of 100Kbps and 400Kbps.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
[bjorn: reformulated part of binding description
added version to compatible
cleaned up example]
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Rob Herring <robh@kernel.org>
[wsa: removed the dummy child node which was a confusing example]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt new file mode 100644 index 0000000..dc71754 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt @@ -0,0 +1,40 @@ +Qualcomm Universal Peripheral (QUP) I2C controller + +Required properties: + - compatible: Should be: + * "qcom,i2c-qup-v1.1.1" for 8660, 8960 and 8064. + * "qcom,i2c-qup-v2.1.1" for 8974 v1. + * "qcom,i2c-qup-v2.2.1" for 8974 v2 and later. + - reg: Should contain QUP register address and length. + - interrupts: Should contain I2C interrupt. + + - clocks: A list of phandles + clock-specifiers, one for each entry in + clock-names. + - clock-names: Should contain: + * "core" for the core clock + * "iface" for the AHB clock + + - #address-cells: Should be <1> Address cells for i2c device address + - #size-cells: Should be <0> as i2c addresses have no size component + +Optional properties: + - clock-frequency: Should specify the desired i2c bus clock frequency in Hz, + defaults to 100kHz if omitted. + +Child nodes should conform to i2c bus binding. + +Example: + + i2c@f9924000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0xf9924000 0x1000>; + interrupts = <0 96 0>; + + clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + + clock-frequency = <355000>; + + #address-cells = <1>; + #size-cells = <0>; + }; |