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authorJohn Crispin <blogic@openwrt.org>2012-07-20 18:58:34 +0200
committerJohn Crispin <blogic@openwrt.org>2013-02-17 01:25:28 +0100
commit247796175ea5dc7c838e8e76a14795fb09360649 (patch)
treefd354393e40da35f650de32989c40360bfb4c93c /Documentation
parent9c099c4e79b67d5578ce8142e6214950be4fcf43 (diff)
downloadop-kernel-dev-247796175ea5dc7c838e8e76a14795fb09360649.zip
op-kernel-dev-247796175ea5dc7c838e8e76a14795fb09360649.tar.gz
Document: devicetree: add OF documents for lantiq serial port
Signed-off-by: John Crispin <blogic@openwrt.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/serial/lantiq_asc.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/lantiq_asc.txt b/Documentation/devicetree/bindings/serial/lantiq_asc.txt
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--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/lantiq_asc.txt
@@ -0,0 +1,16 @@
+Lantiq SoC ASC serial controller
+
+Required properties:
+- compatible : Should be "lantiq,asc"
+- reg : Address and length of the register set for the device
+- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier
+ depends on the interrupt-parent interrupt controller.
+
+Example:
+
+asc1: serial@E100C00 {
+ compatible = "lantiq,asc";
+ reg = <0xE100C00 0x400>;
+ interrupt-parent = <&icu0>;
+ interrupts = <112 113 114>;
+};
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