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author | Ingo Molnar <mingo@elte.hu> | 2008-07-08 11:14:58 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-08 11:14:58 +0200 |
commit | 3de352bbd86f890dd0c5e1c09a6a1b0b29e0f8ce (patch) | |
tree | d4c5eba8cd2abefd7c9f16d089393f0f5999cf63 /Documentation | |
parent | 1b8ba39a3fad9c58532f6dad12c94d6e675be656 (diff) | |
parent | 9340e1ccdf7b9b22a2be7f51cd74e8b5e11961bf (diff) | |
download | op-kernel-dev-3de352bbd86f890dd0c5e1c09a6a1b0b29e0f8ce.zip op-kernel-dev-3de352bbd86f890dd0c5e1c09a6a1b0b29e0f8ce.tar.gz |
Merge branch 'x86/mpparse' into x86/devel
Conflicts:
arch/x86/Kconfig
arch/x86/kernel/io_apic_32.c
arch/x86/kernel/setup_64.c
arch/x86/mm/init_32.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/kernel-parameters.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 7b44e49..da13d6d 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -610,6 +610,29 @@ and is between 256 and 4096 characters. It is defined in the file See drivers/char/README.epca and Documentation/digiepca.txt. + disable_mtrr_cleanup [X86] + enable_mtrr_cleanup [X86] + The kernel tries to adjust MTRR layout from continuous + to discrete, to make X server driver able to add WB + entry later. This parameter enables/disables that. + + mtrr_chunk_size=nn[KMG] [X86] + used for mtrr cleanup. It is largest continous chunk + that could hold holes aka. UC entries. + + mtrr_gran_size=nn[KMG] [X86] + Used for mtrr cleanup. It is granularity of mtrr block. + Default is 1. + Large value could prevent small alignment from + using up MTRRs. + + mtrr_spare_reg_nr=n [X86] + Format: <integer> + Range: 0,7 : spare reg number + Default : 1 + Used for mtrr cleanup. It is spare mtrr entries number. + Set to 2 or more if your graphical card needs more. + disable_mtrr_trim [X86, Intel and AMD only] By default the kernel will trim any uncacheable memory out of your available memory pool based on |