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authorXiubo Li <Li.Xiubo@freescale.com>2014-08-18 15:48:20 +0800
committerMark Brown <broonie@linaro.org>2014-08-18 09:41:54 -0500
commitc99428d035908b9c0b8be452f9b091bc5e090256 (patch)
tree3991ffbbebf5a64cd3ea1dede3011ee97c89d452 /Documentation
parentdc8fcd711610063681f1e9fd860823b1108182ca (diff)
downloadop-kernel-dev-c99428d035908b9c0b8be452f9b091bc5e090256.zip
op-kernel-dev-c99428d035908b9c0b8be452f9b091bc5e090256.tar.gz
spi: fsl-dspi: Convert to use regmap framework's endianness method.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Chao Fu <b44548@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt7
1 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
index 5376de4..cbbe16e 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
@@ -10,7 +10,12 @@ Required properties:
- pinctrl-names: must contain a "default" entry.
- spi-num-chipselects : the number of the chipselect signals.
- bus-num : the slave chip chipselect signal number.
-- big-endian : if DSPI modudle is big endian, the bool will be set in node.
+
+Optional property:
+- big-endian: If present the dspi device's registers are implemented
+ in big endian mode, otherwise in native mode(same with CPU), for more
+ detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
+
Example:
dspi0@4002c000 {
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