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authorEmilio López <emilio@elopez.com.ar>2014-05-13 13:29:26 -0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-06-11 09:58:43 +0200
commit6d1d14d5ce3e7880f91e7cfbdeca88128fe741ca (patch)
treebf0c1364b296b8094fc62712fb4e9358b28378da /Documentation
parente0e7943c55984e7dbae3d7d4c65f6b7ca2e61b81 (diff)
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clk: sunxi: document new A31 USB clock compatible
Support for the USB gates and resets on A31 has been recently added using a new compatible, so let's document it here. Signed-off-by: Emilio López <emilio@elopez.com.ar>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index a5160d8..1f6d3f4 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -41,6 +41,7 @@ Required properties:
"allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
+ "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
Required properties for all clocks:
- reg : shall be the control register address for the clock.
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