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authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-04 14:02:09 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-04 14:02:09 -0700
commit98f486f18d16e2214728d101ed8b6a12dce75539 (patch)
tree987e2fcbd6089a94a00e489cd62fec1b8b10cd02 /Documentation
parent84cbd7222b2b00dcddef3103203986b3d59c836a (diff)
parent97191d734f6ac028e5e6dcd574378c1544a16c0b (diff)
downloadop-kernel-dev-98f486f18d16e2214728d101ed8b6a12dce75539.zip
op-kernel-dev-98f486f18d16e2214728d101ed8b6a12dce75539.tar.gz
Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang: - new drivers: Kontron PLD, Wondermedia VT - mv64xxx driver gained sun4i support and a bigger cleanup - duplicate driver 'intel-mid' removed - added generic device tree binding for sda holding time (and designware driver already uses it) - we tried to allow driver probing with only device tree and no i2c ids, but I had to revert it because of side effects. Needs some rethinking. - driver bugfixes, cleanups... * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (34 commits) i2c-designware: use div_u64 to fix link i2c: Kontron PLD i2c bus driver i2c: iop3xxx: fix build failure after waitqueue changes i2c-designware: make SDA hold time configurable i2c: mv64xxx: Set bus frequency to 100kHz if clock-frequency is not provided i2c: imx: allow autoloading on dt ids i2c: mv64xxx: Fix transfer error code i2c: i801: SMBus patch for Intel Coleto Creek DeviceIDs i2c: omap: correct usage of the interrupt enable register i2c-pxa: prepare clock before use Revert "i2c: core: make it possible to match a pure device tree driver" i2c: nomadik: allocate adapter number dynamically i2c: nomadik: support elder Nomadiks i2c: mv64xxx: Add Allwinner sun4i compatible i2c: mv64xxx: make the registers offset configurable i2c: mv64xxx: Add macros to access parts of registers i2c: vt8500: Add support for I2C bus on Wondermedia SoCs i2c: designware: fix race between subsequent xfers i2c: bfin-twi: Read and write the FIFO in loop i2c: core: make it possible to match a pure device tree driver ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-designware.txt15
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt6
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-vt8500.txt24
-rw-r--r--Documentation/i2c/busses/i2c-i8011
4 files changed, 45 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
index e42a2ee..7fd7fa2 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
@@ -10,6 +10,10 @@ Recommended properties :
- clock-frequency : desired I2C bus clock frequency in Hz.
+Optional properties :
+ - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
+ This option is only supported in hardware blocks version 1.11a or newer.
+
Example :
i2c@f0000 {
@@ -20,3 +24,14 @@ Example :
interrupts = <11>;
clock-frequency = <400000>;
};
+
+ i2c@1120000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,designware-i2c";
+ reg = <0x1120000 0x1000>;
+ interrupt-parent = <&ictl>;
+ interrupts = <12 1>;
+ clock-frequency = <400000>;
+ i2c-sda-hold-time-ns = <300>;
+ };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
index f46d928..a1ee681 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
@@ -6,7 +6,11 @@ Required properties :
- reg : Offset and length of the register set for the device
- compatible : Should be "marvell,mv64xxx-i2c"
- interrupts : The interrupt number
- - clock-frequency : Desired I2C bus clock frequency in Hz.
+
+Optional properties :
+
+ - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the
+default frequency is 100kHz
Examples:
diff --git a/Documentation/devicetree/bindings/i2c/i2c-vt8500.txt b/Documentation/devicetree/bindings/i2c/i2c-vt8500.txt
new file mode 100644
index 0000000..94a425e
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-vt8500.txt
@@ -0,0 +1,24 @@
+* Wondermedia I2C Controller
+
+Required properties :
+
+ - compatible : should be "wm,wm8505-i2c"
+ - reg : Offset and length of the register set for the device
+ - interrupts : <IRQ> where IRQ is the interrupt number
+ - clocks : phandle to the I2C clock source
+
+Optional properties :
+
+ - clock-frequency : desired I2C bus clock frequency in Hz.
+ Valid values are 100000 and 400000.
+ Default to 100000 if not specified, or invalid value.
+
+Example :
+
+ i2c_0: i2c@d8280000 {
+ compatible = "wm,wm8505-i2c";
+ reg = <0xd8280000 0x1000>;
+ interrupts = <19>;
+ clocks = <&clki2c0>;
+ clock-frequency = <400000>;
+ };
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801
index d55b8ab..d29dea0 100644
--- a/Documentation/i2c/busses/i2c-i801
+++ b/Documentation/i2c/busses/i2c-i801
@@ -24,6 +24,7 @@ Supported adapters:
* Intel Lynx Point-LP (PCH)
* Intel Avoton (SOC)
* Intel Wellsburg (PCH)
+ * Intel Coleto Creek (PCH)
Datasheets: Publicly available at the Intel website
On Intel Patsburg and later chipsets, both the normal host SMBus controller
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