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authorTony Prisk <linux@prisktech.co.nz>2013-06-15 09:52:16 +1200
committerWolfram Sang <wsa@the-dreams.de>2013-06-15 13:37:08 +0200
commit560746eb79d3124a278452c8dd968682b521cc82 (patch)
treed27afb9ec1cd900f41bc645001cc3471cf95610e /Documentation
parent38d7fadef4973bb94e36897fcb6bb6a12fdd10c9 (diff)
downloadop-kernel-dev-560746eb79d3124a278452c8dd968682b521cc82.zip
op-kernel-dev-560746eb79d3124a278452c8dd968682b521cc82.tar.gz
i2c: vt8500: Add support for I2C bus on Wondermedia SoCs
This patch adds support for the I2C bus controllers found on Wondermedia 8xxx-series SoCs. Only master-mode is supported. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> [wsa: fixed one macro to shift 8 instead of 16] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-vt8500.txt24
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+* Wondermedia I2C Controller
+
+Required properties :
+
+ - compatible : should be "wm,wm8505-i2c"
+ - reg : Offset and length of the register set for the device
+ - interrupts : <IRQ> where IRQ is the interrupt number
+ - clocks : phandle to the I2C clock source
+
+Optional properties :
+
+ - clock-frequency : desired I2C bus clock frequency in Hz.
+ Valid values are 100000 and 400000.
+ Default to 100000 if not specified, or invalid value.
+
+Example :
+
+ i2c_0: i2c@d8280000 {
+ compatible = "wm,wm8505-i2c";
+ reg = <0xd8280000 0x1000>;
+ interrupts = <19>;
+ clocks = <&clki2c0>;
+ clock-frequency = <400000>;
+ };
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