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author | Stanimir Varbanov <svarbanov@mm-sol.com> | 2013-10-15 17:11:17 +0300 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2013-10-30 12:02:55 +0800 |
commit | 2883229309a13760296abc91ac5f64f3dffc4801 (patch) | |
tree | 7eba36b5a8e4b3059f97ce4590e091028be433f6 /Documentation | |
parent | f3d53ed038944a5e785f04952170f7e239a49ae8 (diff) | |
download | op-kernel-dev-2883229309a13760296abc91ac5f64f3dffc4801.zip op-kernel-dev-2883229309a13760296abc91ac5f64f3dffc4801.tar.gz |
ARM: DT: msm: Add Qualcomm's PRNG driver binding document
This adds Qualcomm PRNG driver device tree binding documentation
to use as an example in dts trees.
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt new file mode 100644 index 0000000..8e5853c --- /dev/null +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt @@ -0,0 +1,17 @@ +Qualcomm MSM pseudo random number generator. + +Required properties: + +- compatible : should be "qcom,prng" +- reg : specifies base physical address and size of the registers map +- clocks : phandle to clock-controller plus clock-specifier pair +- clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block + +Example: + + rng@f9bff000 { + compatible = "qcom,prng"; + reg = <0xf9bff000 0x200>; + clocks = <&clock GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; |