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| author | Florian Fainelli <f.fainelli@gmail.com> | 2017-06-15 13:39:51 -0700 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2017-09-18 11:59:41 -0700 |
| commit | 9600c2340ded841076367cc78fdd2b65e1cf8ed8 (patch) | |
| tree | 3ac05994b25408c9b679fc0b848d1212d64e760f /Documentation | |
| parent | 2f330caff5776239abb3e0337533886dbb21f6df (diff) | |
| download | op-kernel-dev-9600c2340ded841076367cc78fdd2b65e1cf8ed8.zip op-kernel-dev-9600c2340ded841076367cc78fdd2b65e1cf8ed8.tar.gz | |
dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
Update the Broadcom STB Power Management binding document with new
compatible strings for the DDR PHY and memory controller found on newer
chips.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt index 0d0c1ae..790e6b0 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt @@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY. Required properties: - compatible : should contain one of these + "brcm,brcmstb-ddr-phy-v71.1" + "brcm,brcmstb-ddr-phy-v72.0" "brcm,brcmstb-ddr-phy-v225.1" "brcm,brcmstb-ddr-phy-v240.1" "brcm,brcmstb-ddr-phy-v240.2" @@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh Power-Down (SRPD), among other things. Required properties: -- compatible : should contain "brcm,brcmstb-memc-ddr" +- compatible : should contain one of these + "brcm,brcmstb-memc-ddr-rev-b.2.2" + "brcm,brcmstb-memc-ddr" - reg : the MEMC DDR register range Example: |
