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authorArnd Bergmann <arnd@arndb.de>2017-10-20 22:34:41 +0200
committerArnd Bergmann <arnd@arndb.de>2017-10-20 22:34:41 +0200
commit8a36c27d19bdd750832300c4327731b0792e2830 (patch)
treebb871ed966d3bf47f5a7f1adc8de5209a078c552 /Documentation
parentea9e3fbc1748ac4805350778768e3ad801ade5f7 (diff)
parent8c1b7dc9ba2294c6dbd1870a3d2e534bfda3047a (diff)
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op-kernel-dev-8a36c27d19bdd750832300c4327731b0792e2830.tar.gz
Merge tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Pull "Qualcomm ARM Based Driver Updates for v4.15" from Andy Gross: * Add SCM firmware APIs for download mode and secure IO service * Add SMEM support for cached entries * Add SMEM support for global partition, dynamic item limit, and more hosts * tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: firmware: qcom: scm: Expose download-mode control firmware: qcom: scm: Expose secure IO service soc: qcom: smem: Increase the number of hosts soc: qcom: smem: Support dynamic item limit soc: qcom: smem: Support global partition soc: qcom: smem: Read version from the smem header soc: qcom: smem: Use le32_to_cpu for comparison soc: qcom: smem: Support getting cached entries soc: qcom: smem: Rename "uncached" accessors
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/firmware/qcom,scm.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
index 20f26fb..7b40054 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
@@ -18,6 +18,8 @@ Required properties:
* Core, iface, and bus clocks required for "qcom,scm"
- clock-names: Must contain "core" for the core clock, "iface" for the interface
clock and "bus" for the bus clock per the requirements of the compatible.
+- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
+ download mode control register (optional)
Example for MSM8916:
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