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authorHuang Rui <ray.huang@amd.com>2014-10-31 11:11:18 +0800
committerFelipe Balbi <balbi@ti.com>2014-11-03 10:03:41 -0600
commit460d098cb6728134e0e4ba3d58e10bb43032daa5 (patch)
treefbdd6c3e61e7b5000c8574b9927c614004829574 /Documentation
parent9755449d568b3c2745fc9c7075a7d7833c4528bd (diff)
downloadop-kernel-dev-460d098cb6728134e0e4ba3d58e10bb43032daa5.zip
op-kernel-dev-460d098cb6728134e0e4ba3d58e10bb43032daa5.tar.gz
usb: dwc3: make HIRD threshold configurable
HIRD threshold should be configurable by different platforms. From DesignWare databook: When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1. When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/usb/dwc3.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index f200ecc..cd7f045 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -34,6 +34,9 @@ Optional properties:
LTSSM during USB3 Compliance mode.
- snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
- snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
+ - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
+ utmi_l1_suspend_n, false when asserts utmi_sleep_n
+ - snps,hird-threshold: HIRD threshold
This is usually a subnode to DWC3 glue to which it is connected.
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