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author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-09-22 16:45:14 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-23 07:39:37 -0700 |
commit | 50dfe70fe9e216cf356830194630f9a39e498d76 (patch) | |
tree | c30ca2aee39cb544f2013509c0d1d51158b5b868 /Documentation/powerpc | |
parent | 81b39802468fe4bf5c6b038837319b608acfdd3e (diff) | |
download | op-kernel-dev-50dfe70fe9e216cf356830194630f9a39e498d76.zip op-kernel-dev-50dfe70fe9e216cf356830194630f9a39e498d76.tar.gz |
powerpc: introduce and document sdhci,wp-inverted property for eSDHC
eSDHC block in MPC837x SOCs reports inverted write-protect state, soon
sdhci-of driver will look for sdhci,wp-inverted properties to decide
whether apply a specific quirk.
So, document the property and add it to device tree source files.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Ben Dooks <ben@fluff.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/esdhc.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt index 3ed3797..8a00407 100644 --- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt +++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt @@ -10,6 +10,8 @@ Required properties: - interrupts : should contain eSDHC interrupt. - interrupt-parent : interrupt source phandle. - clock-frequency : specifies eSDHC base clock frequency. + - sdhci,wp-inverted : (optional) specifies that eSDHC controller + reports inverted write-protect state; - sdhci,1-bit-only : (optional) specifies that a controller can only handle 1-bit data transfers. |