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author | Andy Fleming <afleming@freescale.com> | 2007-07-10 16:42:04 -0500 |
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committer | Jeff Garzik <jeff@garzik.org> | 2007-07-18 18:29:37 -0400 |
commit | 1d5e83aac54b64b71b225fd5cf2e82491ad145f6 (patch) | |
tree | c815c595c104997f017102ed04ec33cffb8cd309 /Documentation/powerpc | |
parent | 5bae7ac9feba925fd0099057f6b23d7be80b7b41 (diff) | |
download | op-kernel-dev-1d5e83aac54b64b71b225fd5cf2e82491ad145f6.zip op-kernel-dev-1d5e83aac54b64b71b225fd5cf2e82491ad145f6.tar.gz |
Fix Vitesse 824x PHY interrupt acking
The Vitesse 824x PHY doesn't allow an interrupt to be cleared if
the mask bit for that interrupt isn't set. This means that the PHY
Lib's order of handling interrupts (disable, then clear) breaks on this
PHY. However, clearing then disabling the interrupt opens up the code
for a silly race condition. So rather than change the PHY Lib, we change
the Vitesse driver so it always clears interrupts before disabling them.
Further, the ack function only clears the interrupt if interrupts are
enabled.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Haiying Wang <Haiying.Wang@freescale.com>
Diffstat (limited to 'Documentation/powerpc')
0 files changed, 0 insertions, 0 deletions