diff options
| author | Helge Deller <deller@gmx.de> | 2013-06-29 13:24:16 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2013-07-09 22:09:19 +0200 |
| commit | a83f58bcb24003b9de2364de7c829a263423ead7 (patch) | |
| tree | 1d6a4d3d0664dffdd3bcff0a2c305e4ad2581682 /Documentation/parisc | |
| parent | 30a9f0b251285ba29f09a7134eee07a4c3aca639 (diff) | |
| download | op-kernel-dev-a83f58bcb24003b9de2364de7c829a263423ead7.zip op-kernel-dev-a83f58bcb24003b9de2364de7c829a263423ead7.tar.gz | |
parisc: document the shadow registers
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # 3.10
Diffstat (limited to 'Documentation/parisc')
| -rw-r--r-- | Documentation/parisc/registers | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/parisc/registers b/Documentation/parisc/registers index dd3cadd..10c7d17 100644 --- a/Documentation/parisc/registers +++ b/Documentation/parisc/registers @@ -78,6 +78,14 @@ Shadow Registers used by interruption handler code TOC enable bit 1 ========================================================================= + +The PA-RISC architecture defines 7 registers as "shadow registers". +Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce +the state save and restore time by eliminating the need for general register +(GR) saves and restores in interruption handlers. +Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25. + +========================================================================= Register usage notes, originally from John Marvin, with some additional notes from Randolph Chung. |
