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authorAdrian Bunk <bunk@stusta.de>2006-06-30 18:27:16 +0200
committerAdrian Bunk <bunk@stusta.de>2006-06-30 18:27:16 +0200
commit80f7228b59e4bbe9d840af3ff0f2fe480d6e7c79 (patch)
tree08e6d2365abeafd7bfcc0fd7485db9055463d72c /Documentation/memory-barriers.txt
parent47bdd718c6547d84c8e140cd0f495c016f13b08b (diff)
downloadop-kernel-dev-80f7228b59e4bbe9d840af3ff0f2fe480d6e7c79.zip
op-kernel-dev-80f7228b59e4bbe9d840af3ff0f2fe480d6e7c79.tar.gz
typo fixes: occuring -> occurring
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r--Documentation/memory-barriers.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index cf0d541..28d1bc3 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -602,7 +602,7 @@ Consider the following sequence of events:
This sequence of events is committed to the memory coherence system in an order
that the rest of the system might perceive as the unordered set of { STORE A,
-STORE B, STORE C } all occuring before the unordered set of { STORE D, STORE E
+STORE B, STORE C } all occurring before the unordered set of { STORE D, STORE E
}:
+-------+ : :
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