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| author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-10 13:47:26 -0500 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-10 13:47:26 -0500 |
| commit | f0cd91a68acdc9b49d7f6738b514a426da627649 (patch) | |
| tree | 8ad73564015794197583b094217ae0a71e71e753 /Documentation/memory-barriers.txt | |
| parent | 60eef25701d25e99c991dd0f4a9f3832a0c3ad3e (diff) | |
| parent | 128e6ced247cda88f96fa9f2e4ba8b2c4a681560 (diff) | |
| download | op-kernel-dev-f0cd91a68acdc9b49d7f6738b514a426da627649.zip op-kernel-dev-f0cd91a68acdc9b49d7f6738b514a426da627649.tar.gz | |
Merge ../linux-2.6
Diffstat (limited to 'Documentation/memory-barriers.txt')
| -rw-r--r-- | Documentation/memory-barriers.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 92f0056..c61d8b8 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -1031,7 +1031,7 @@ conflict on any particular lock. LOCKS VS MEMORY ACCESSES ------------------------ -Consider the following: the system has a pair of spinlocks (N) and (Q), and +Consider the following: the system has a pair of spinlocks (M) and (Q), and three CPUs; then should the following sequence of events occur: CPU 1 CPU 2 @@ -1678,7 +1678,7 @@ CPU's caches by some other cache event: smp_wmb(); <A:modify v=2> <C:busy> <C:queue v=2> - p = &b; q = p; + p = &v; q = p; <D:request p> <B:modify p=&v> <D:commit p=&v> <D:read p> |
