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| author | Catalin Marinas <catalin.marinas@arm.com> | 2008-11-06 13:23:08 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2008-11-06 13:23:08 +0000 |
| commit | 376e14218d3d791127e9b9bfbe2f99c44c2a19c2 (patch) | |
| tree | 227ff719a9b4092a610c51f15a00a599ed072cc5 /Documentation/input | |
| parent | 24b647a042b988b017e6cdf60b47a0bfecd1dc41 (diff) | |
| download | op-kernel-dev-376e14218d3d791127e9b9bfbe2f99c44c2a19c2.zip op-kernel-dev-376e14218d3d791127e9b9bfbe2f99c44c2a19c2.tar.gz | |
Do not flush the cache in flush_cache_v(un)map for VIPT caches
In case of non-aliasing VIPT caches, there is no need to flush the whole
cache when new mapping is created. The patch introduces this condition
check. In the non-aliasing VIPT case flush_cache_vmap() needs a DSB
since the set_pte_at() function called from vmap_pte_range() does not
have such barrier (done usually via TLB flushing functions).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'Documentation/input')
0 files changed, 0 insertions, 0 deletions
