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authorBruce Allan <bruce.w.allan@intel.com>2009-10-26 11:24:02 +0000
committerDavid S. Miller <davem@davemloft.net>2009-10-26 16:16:25 -0700
commit5ccdcecb72692d46d7a9264e62751241c7eca559 (patch)
treec82d7487a41fed230234578f1ddbe1b35ea59e5e /Documentation/ia64
parentca15df58b1b98f073393eef3704674b45d1cb474 (diff)
downloadop-kernel-dev-5ccdcecb72692d46d7a9264e62751241c7eca559.zip
op-kernel-dev-5ccdcecb72692d46d7a9264e62751241c7eca559.tar.gz
e1000e: allow for swflag to be held over consecutive PHY accesses
PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses in order to perform sw-driven PHY configuration during initialization to workaround known hardware issues (see follow-on patch). This patch provides new PHY read/write functions (and function pointers) that will allow accessing the PHY registers assuming the swflag has already been acquired. The actual PHY register access code has moved into helper functions that are called with a flag indicating whether or not the swflag has already been acquired and acquires/releases it if not. The functions called from within the updated PHY access functions had to be updated to assume the swflag was already acquired, and other functions that called those functions were also updated to acquire/release the swflag. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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