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author | Grant Likely <grant.likely@secretlab.ca> | 2012-07-24 22:31:09 -0600 |
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committer | Grant Likely <grant.likely@secretlab.ca> | 2012-07-24 22:34:40 -0600 |
commit | 6aeea3ecc33b1f36dbc3b80461d15a7052ae424f (patch) | |
tree | bbd273e3e0ca76094aed8e9c77e5adfe2b07f779 /Documentation/i2c/busses/i2c-piix4 | |
parent | 9844a5524ec532aee826c35e3031637c7fc8287b (diff) | |
parent | bdc0077af574800d24318b6945cf2344e8dbb050 (diff) | |
download | op-kernel-dev-6aeea3ecc33b1f36dbc3b80461d15a7052ae424f.zip op-kernel-dev-6aeea3ecc33b1f36dbc3b80461d15a7052ae424f.tar.gz |
Merge remote-tracking branch 'origin' into irqdomain/next
Diffstat (limited to 'Documentation/i2c/busses/i2c-piix4')
-rw-r--r-- | Documentation/i2c/busses/i2c-piix4 | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index 475bb4a..1e6634f 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -8,6 +8,11 @@ Supported adapters: Datasheet: Only available via NDA from ServerWorks * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges Datasheet: Not publicly available + SB700 register reference available at: + http://support.amd.com/us/Embedded_TechDocs/43009_sb7xx_rrg_pub_1.00.pdf + * AMD SP5100 (SB700 derivative found on some server mainboards) + Datasheet: Publicly available at the AMD website + http://support.amd.com/us/Embedded_TechDocs/44413.pdf * AMD Hudson-2 Datasheet: Not publicly available * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge @@ -68,6 +73,10 @@ this driver on those mainboards. The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are identical to the PIIX4 in I2C/SMBus support. +The AMD SB700 and SP5100 chipsets implement two PIIX4-compatible SMBus +controllers. If your BIOS initializes the secondary controller, it will +be detected by this driver as an "Auxiliary SMBus Host Controller". + If you own Force CPCI735 motherboard or other OSB4 based systems you may need to change the SMBus Interrupt Select register so the SMBus controller uses the SMI mode. |