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authorAndy Lutomirski <luto@amacapital.net>2013-05-13 23:58:46 +0000
committerDave Airlie <airlied@redhat.com>2013-05-31 13:37:36 +1000
commit63e28a7a5ffce59b645ca9cbcc01e1e8be56bd75 (patch)
tree9f1772e41599f71bda18c71cc78480d7576e1b73 /Documentation/fb
parent07ebea251d08ae851d501f7402359f053d038862 (diff)
downloadop-kernel-dev-63e28a7a5ffce59b645ca9cbcc01e1e8be56bd75.zip
op-kernel-dev-63e28a7a5ffce59b645ca9cbcc01e1e8be56bd75.tar.gz
uvesafb: Clean up MTRR code
The old code allowed very strange memory types. Now it works like all the other video drivers: ioremap_wc is used unconditionally, and MTRRs are set if PAT is unavailable (unless MTRR is disabled by a module parameter). UC, WB, and WT support is gone. If there are MTRR conflicts that prevent addition of a WC MTRR, adding a non-conflicting MTRR is pointless; it's better to just turn off MTRR support entirely. As an added bonus, any MTRR added is freed on unload. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Andy Lutomirski <luto@amacapital.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'Documentation/fb')
-rw-r--r--Documentation/fb/uvesafb.txt16
1 files changed, 5 insertions, 11 deletions
diff --git a/Documentation/fb/uvesafb.txt b/Documentation/fb/uvesafb.txt
index eefdd91..f6362d8 100644
--- a/Documentation/fb/uvesafb.txt
+++ b/Documentation/fb/uvesafb.txt
@@ -81,17 +81,11 @@ pmipal Use the protected mode interface for palette changes.
mtrr:n Setup memory type range registers for the framebuffer
where n:
- 0 - disabled (equivalent to nomtrr) (default)
- 1 - uncachable
- 2 - write-back
- 3 - write-combining
- 4 - write-through
-
- If you see the following in dmesg, choose the type that matches
- the old one. In this example, use "mtrr:2".
-...
-mtrr: type mismatch for e0000000,8000000 old: write-back new: write-combining
-...
+ 0 - disabled (equivalent to nomtrr)
+ 3 - write-combining (default)
+
+ Values other than 0 and 3 will result in a warning and will be
+ treated just like 3.
nomtrr Do not use memory type range registers.
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