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authorAlexandre Pereira da Silva <aletes.xgr@gmail.com>2012-07-10 11:38:10 -0300
committerThierry Reding <thierry.reding@avionic-design.de>2012-07-23 13:24:05 +0200
commit2132fa8d95bc13b8b0e307553b04ee3517762ebe (patch)
tree7f7f843273eeb8b2ce6c9f05a725c02fb4abde4f /Documentation/devicetree/bindings
parent9fb978b12f9cc2b4df428764273d96877d0a262d (diff)
downloadop-kernel-dev-2132fa8d95bc13b8b0e307553b04ee3517762ebe.zip
op-kernel-dev-2132fa8d95bc13b8b0e307553b04ee3517762ebe.tar.gz
pwm: add lpc32xx PWM support
Add lpc32xx SOC PWM driver. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Acked-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt12
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
new file mode 100644
index 0000000..cfe1db3
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
@@ -0,0 +1,12 @@
+LPC32XX PWM controller
+
+Required properties:
+- compatible: should be "nxp,lpc3220-pwm"
+- reg: physical base address and length of the controller's registers
+
+Examples:
+
+pwm@0x4005C000 {
+ compatible = "nxp,lpc3220-pwm";
+ reg = <0x4005C000 0x8>;
+};
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