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authorMarek Vasut <marex@denx.de>2012-07-09 18:22:53 +0200
committerWolfram Sang <w.sang@pengutronix.de>2012-07-13 10:33:42 +0200
commitcd4f2d4aa79ccbb2713f33f9c9f24ed21b5fc8fa (patch)
treef18425262e5ab482c4b6b12dbbf5ca8759ad33b3 /Documentation/devicetree/bindings
parent90c16bbf57412d69fb29ca61a3942c8f433aa381 (diff)
downloadop-kernel-dev-cd4f2d4aa79ccbb2713f33f9c9f24ed21b5fc8fa.zip
op-kernel-dev-cd4f2d4aa79ccbb2713f33f9c9f24ed21b5fc8fa.tar.gz
i2c: mxs: Set I2C timing registers for mxs-i2c
This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported. The TIMING2 register value is wrong in the documentation for i.MX28! This was found and fixed by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-mxs.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
index 1bfc02d..30ac3a0 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
@@ -4,6 +4,8 @@ Required properties:
- compatible: Should be "fsl,<chip>-i2c"
- reg: Should contain registers location and length
- interrupts: Should contain ERROR and DMA interrupts
+- clock-frequency: Desired I2C bus clock frequency in Hz.
+ Only 100000Hz and 400000Hz modes are supported.
Examples:
@@ -13,4 +15,5 @@ i2c0: i2c@80058000 {
compatible = "fsl,imx28-i2c";
reg = <0x80058000 2000>;
interrupts = <111 68>;
+ clock-frequency = <100000>;
};
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