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author | Arnd Bergmann <arnd@arndb.de> | 2011-07-28 15:25:46 +0000 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-28 15:25:46 +0000 |
commit | 6124a4e430b64d1577438c8648c59e996d02e73e (patch) | |
tree | 49cfafad785d1c9e403a5b0d755298b9af2c260f /Documentation/devicetree/bindings | |
parent | 8e267f3da5f117d2f1316cf6ddf740f93f1c73aa (diff) | |
parent | 580975d7f48d7d047e22bb0f42adf7557801d8d4 (diff) | |
download | op-kernel-dev-6124a4e430b64d1577438c8648c59e996d02e73e.zip op-kernel-dev-6124a4e430b64d1577438c8648c59e996d02e73e.tar.gz |
Merge branch 'imx/dt' into next/dt
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r-- | Documentation/devicetree/bindings/arm/sirf.txt | 3 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/arm/xilinx.txt | 7 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 17 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 34 | ||||
-rw-r--r--[-rwxr-xr-x] | Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 0 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/net/fsl-fec.txt | 24 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt | 5 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt | 19 |
8 files changed, 109 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt new file mode 100644 index 0000000..6b07f65 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/sirf.txt @@ -0,0 +1,3 @@ +prima2 "cb" evalutation board +Required root node properties: + - compatible = "sirf,prima2-cb", "sirf,prima2"; diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt new file mode 100644 index 0000000..6f1ed830 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -0,0 +1,7 @@ +Xilinx Zynq EP107 Emulation Platform board + +This board is an emulation platform for the Zynq product which is +based on an ARM Cortex A9 processor. + +Required root node properties: + - compatible = "xlnx,zynq-ep107"; diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt new file mode 100644 index 0000000..d1e3f44 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt @@ -0,0 +1,17 @@ +* Freescale Smart Direct Memory Access (SDMA) Controller for i.MX + +Required properties: +- compatible : Should be "fsl,<chip>-sdma" +- reg : Should contain SDMA registers location and length +- interrupts : Should contain SDMA interrupt +- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM + scripts firmware + +Examples: + +sdma@83fb0000 { + compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; + reg = <0x83fb0000 0x4000>; + interrupts = <6>; + fsl,sdma-ram-script-name = "sdma-imx51.bin"; +}; diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt new file mode 100644 index 0000000..ab22fe6 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt @@ -0,0 +1,34 @@ +* Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX + +The Enhanced Secure Digital Host Controller on Freescale i.MX family +provides an interface for MMC, SD, and SDIO types of memory cards. + +Required properties: +- compatible : Should be "fsl,<chip>-esdhc" +- reg : Should contain eSDHC registers location and length +- interrupts : Should contain eSDHC interrupt + +Optional properties: +- fsl,card-wired : Indicate the card is wired to host permanently +- fsl,cd-internal : Indicate to use controller internal card detection +- fsl,wp-internal : Indicate to use controller internal write protection +- cd-gpios : Specify GPIOs for card detection +- wp-gpios : Specify GPIOs for write protection + +Examples: + +esdhc@70004000 { + compatible = "fsl,imx51-esdhc"; + reg = <0x70004000 0x4000>; + interrupts = <1>; + fsl,cd-internal; + fsl,wp-internal; +}; + +esdhc@70008000 { + compatible = "fsl,imx51-esdhc"; + reg = <0x70008000 0x4000>; + interrupts = <2>; + cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ + wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ +}; diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index 1a729f0..1a729f0 100755..100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt new file mode 100644 index 0000000..de43951 --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt @@ -0,0 +1,24 @@ +* Freescale Fast Ethernet Controller (FEC) + +Required properties: +- compatible : Should be "fsl,<soc>-fec" +- reg : Address and length of the register set for the device +- interrupts : Should contain fec interrupt +- phy-mode : String, operation mode of the PHY interface. + Supported values are: "mii", "gmii", "sgmii", "tbi", "rmii", + "rgmii", "rgmii-id", "rgmii-rxid", "rgmii-txid", "rtbi", "smii". +- phy-reset-gpios : Should specify the gpio for phy reset + +Optional properties: +- local-mac-address : 6 bytes, mac address + +Example: + +fec@83fec000 { + compatible = "fsl,imx51-fec", "fsl,imx27-fec"; + reg = <0x83fec000 0x4000>; + interrupts = <87>; + phy-mode = "mii"; + phy-reset-gpios = <&gpio1 14 0>; /* GPIO2_14 */ + local-mac-address = [00 04 9F 01 1B B9]; +}; diff --git a/Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt b/Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt new file mode 100644 index 0000000..a2891ce --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/olpc-xo1-rtc.txt @@ -0,0 +1,5 @@ +OLPC XO-1 RTC +~~~~~~~~~~~~~ + +Required properties: + - compatible : "olpc,xo1-rtc" diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt new file mode 100644 index 0000000..a9c0406 --- /dev/null +++ b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt @@ -0,0 +1,19 @@ +* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART) + +Required properties: +- compatible : Should be "fsl,<soc>-uart" +- reg : Address and length of the register set for the device +- interrupts : Should contain uart interrupt + +Optional properties: +- fsl,uart-has-rtscts : Indicate the uart has rts and cts +- fsl,irda-mode : Indicate the uart supports irda mode + +Example: + +uart@73fbc000 { + compatible = "fsl,imx51-uart", "fsl,imx21-uart"; + reg = <0x73fbc000 0x4000>; + interrupts = <31>; + fsl,uart-has-rtscts; +}; |