diff options
author | Stephen Warren <swarren@nvidia.com> | 2016-07-19 13:14:40 -0600 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2016-11-18 14:33:43 +0100 |
commit | ad7cb19824f41421f68bc757b3e1fba4dcde600a (patch) | |
tree | 8c10ffc206bd8331cebcd53836ef45b6294e8b96 /Documentation/devicetree/bindings | |
parent | 983de5f97169ab59d4cb0f60d9d9157778ce4a5e (diff) | |
download | op-kernel-dev-ad7cb19824f41421f68bc757b3e1fba4dcde600a.zip op-kernel-dev-ad7cb19824f41421f68bc757b3e1fba4dcde600a.tar.gz |
dt-bindings: Add power domains to Tegra BPMP firmware
The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r-- | Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt index 7c7edaf..0d3fef4 100644 --- a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt +++ b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt @@ -17,6 +17,7 @@ Required properties: - shmem : List of the phandle of the TX and RX shared memory area that the IPC between CPU and BPMP is based on. - #clock-cells : Should be 1. +- #power-domain-cells : Should be 1. - #reset-cells : Should be 1. This node is a mailbox consumer. See the following files for details of @@ -26,12 +27,14 @@ provider(s): - .../mailbox/mailbox.txt - .../mailbox/nvidia,tegra186-hsp.txt -This node is a clock and reset provider. See the following files for -general documentation of those features, and the specifiers implemented -by this node: +This node is a clock, power domain, and reset provider. See the following +files for general documentation of those features, and the specifiers +implemented by this node: - .../clock/clock-bindings.txt - <dt-bindings/clock/tegra186-clock.h> +- ../power/power_domain.txt +- <dt-bindings/power/tegra186-powergate.h> - .../reset/reset.txt - <dt-bindings/reset/tegra186-reset.h> @@ -77,5 +80,6 @@ bpmp { mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>; shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; }; |